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ARM® Cortex®-A72 MPCore Processor Technical Reference ManualRevision r0p2
Home > AArch32 Unpredictable Behaviors > Debug unpredictable behaviors > P = 31: reads and writes of PMXEVCNTR_EL0

B.2.24 P = 31: reads and writes of PMXEVCNTR_EL0

The processor implements:
  • The register is RES0.
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Home > AArch32 Unpredictable Behaviors > Debug unpredictable behaviors > P = 31: reads and writes of PMXEVCNTR_EL0