8.3.5 Virtual interface control register descriptions

VGIC Type Memory-Mapped Register

The GICH_VTR characteristics are:
Purpose
Holds information on number of priority bits, number of preemption bits, and number of List Registers implemented.
Usage constraints
There are no usage constraints.
Configurations
Available if the GIC is implemented and setup for memory-mapped accesses.
Attributes
See the register summary in Table 8-9 Virtual interface control register summary.
The following figure shows the GICH_VTR bit assignments.
Figure 8-2 GICH_VTR bit assignments
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The following table shows the GICH_VTR bit assignments.

Table 8-12 GICH_VTR bit assignments

Bit Name Description
[31:29] PRIbits
Indicates the number of priority bits implemented, minus one:
0b100Five bits of priority and 32 priority levels.
[28:26] PREbits
Indicates the number of preemption bits implemented, minus one:
0b100Five bits of preemption and 32 preemption levels.
[25:6] - Reserved, RAZ.
[5:0] ListRegs
Indicates the number of implemented List Registers, minus one:
0b00 0011Four List Registers.

VGIC Type System Register

The ICH_VTR_EL2 characteristics are:
Purpose
Holds information on number of priority bits, number of preemption bits, and number of List Registers implemented.
Usage constraints
There are no usage constraints.
Configurations
Available if the GIC is implemented and setup for System register accesses.
Attributes
See the register summary in Table 8-9 Virtual interface control register summary..
The following figure shows the ICH_VTR_EL2 bit assignments.
Figure 8-3 ICH_VTR_EL2 bit assignments
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The following table shows the ICH_VTR_EL2 bit assignments.

Table 8-13 ICH_VTR_EL2 bit assignments

Bit Name Description
[31:29] PRIbits
Indicates the number of priority bits implemented, minus one:
0b100Five bits of priority and 32 priority levels.
[28:26] PREbits
Indicates the number of preemption bits implemented, minus one:
0b100Five bits of preemption and 32 preemption levels.
[25:23] IDbits
Indicates the number of virtual interrupt identifier bits supported:
0b00016 bits of virtual interrupt identifier.
[22] SEIS
Indicates if locally generated virtual System Errors are supported:
0b0Locally generated virtual System Errors are not supported.
[21] A3V
Indicates if affinity level 3 is supported in SGI generation from System registers:
0b0SGI generation from System registers does not support affinity level 3.
[20:5] - Reserved, RAZ.
[4:0] ListRegs
Indicates the number of implemented List Registers, minus one:
0b000011Four List Registers.
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