4.5.17 Data Fault Status Register

The DFSR characteristics are:
Purpose
Holds status information about the last data fault.
Usage constraints
The accessibility to the DFSR by Exception level is:
EL0 EL1(NS) EL1(S) EL2 EL3(SCR.NS = 1) EL3(SCR.NS = 0)
- RW RW RW RW RW
Configurations
The DFSR is Banked for Secure and Non-secure states.
The architectural mapping of the DFSR is:
  • The Non-secure DFSR is mapped to the AArch64 ESR_EL1 register.
  • The Secure DFSR is mapped to the AArch64 ESR_EL3 register.
Attributes
There are two formats for this register. The value of TTBCR.EAE selects which format of the register is used. The two formats are:
Related information
4.3.50 Exception Syndrome Register, EL1 and EL3

DFSR format when using the Short-descriptor translation table format

The following figure shows the DFSR bit assignments when using the Short-descriptor translation table format.

Figure 4-91 DFSR bit assignments for Short-descriptor translation table format
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The following table shows the DFSR bit assignments when using the Short-descriptor translation table format.

Table 4-127 DFSR bit assignments for Short-descriptor translation table format

Bits Name Function
[31:16] - Reserved, RES0.
[15] UA
Unattributable fault. This bit is only set for System Errors. For other faults, it is RES0. The values are:
0Attributable, can be attributed to the processing element counting the event.
1Unattributable, cannot be attributed to any particular processor.
[14] UC
Uncontainable fault. This bit is only set for System Errors. For other faults, it is RES0. The values are:
0Containable, an attributable event that can be contained to a particular code sequence.
1Uncontainable, cannot be contained to a particular code sequence.
Unattributable events are Uncontainable.
[13] CM
Cache maintenance fault. For synchronous faults, this bit indicates whether a cache maintenance operation generated the fault. The values are:
0Abort not caused by a cache maintenance operation.
1Abort caused by a cache maintenance operation.
On an asynchronous fault, this bit is UNKNOWN.
[12] ExT
External abort type. This field indicates whether an AXI decode or slave error caused an abort:
0External abort marked as DECERR.
1External abort marked as SLVERR.
For aborts other than external aborts this bit always returns 0.
[11] WnR
Write not Read bit. This field indicates whether a write or a read access caused the abort:
0Abort caused by a read access.
1Abort caused by a write access.
For faults on CP15 cache maintenance operations, including the VA to PA translation operations, this bit always returns a value of 1.
[10] FS[4] Part of the Fault Status field. See bits[3:0] in this table.
[9] LPAE
Large physical address extension. The value of the format descriptor is:
0Short-descriptor translation table formats.
[8] - Reserved, RES0.
[7:4] Domain The domain of the fault address. Use of the field is deprecated.
[3:0] FS[3:0]
Fault Status bits. This field indicates the type of exception generated. The possible values are:
0b00001Alignment fault.
0b01100Synchronous external abort on translation table walk, 1st level.
0b01110Synchronous external abort on translation table walk, 2nd level.
0b11100Synchronous parity error on translation table walk, 1st level.
0b11110Synchronous parity error on translation table walk, 2nd level.
0b00101Translation fault, 1st level.
0b00111Translation fault, 2nd level.
0b00011Access flag fault, 1st level.
0b00110Access flag fault, 2nd level.
0b01001Domain fault, 1st level.
0b01011Domain fault, 2nd level.
0b01101Permission fault, 1st level.
0b01111Permission fault, 2nd level.
0b00010Debug event.
0b01000Synchronous external abort, non-translation.
0b11001Synchronous parity error on memory access.
0b10110Asynchronous external abort.
0b11000Asynchronous parity error on memory access.
All other values are reserved.

DFSR format when using the Long-descriptor translation table format

The following figure shows the DFSR bit assignments when using the Long-descriptor translation table format.

Figure 4-92 DFSR bit assignments for Long-descriptor translation table format
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following table shows the DFSR bit assignments when using the Long-descriptor translation table format.

Table 4-128 DFSR bit assignments for Long-descriptor translation table format

Bits Name Function
[31:16] - Reserved, RES0.
[15] UA
Unattributable fault. This bit is only set for System Errors. For other faults, it is RES0. The values are:
0Attributable, can be attributed to the processing element counting the event.
1Unattributable, cannot be attributed to any particular processor.
[14] UC
Uncontainable fault. This bit is only set for System Errors. For other faults, it is RES0. The values are:
0Containable, an attributable event that can be contained to a particular code sequence.
1Uncontainable, cannot be contained to a particular code sequence.
Unattributable events are Uncontainable.
[13] CM
Cache maintenance fault. For synchronous faults, this bit indicates whether a cache maintenance operation generated the fault:
0Abort not caused by a cache maintenance operation.
1Abort caused by a cache maintenance operation.
On an asynchronous fault, this bit is UNKNOWN.
[12] ExT
External abort type. This field indicates whether an AXI decode or slave error caused an abort:
0External abort marked as DECERR.
1External abort marked as SLVERR.
For aborts other than external aborts this bit always returns 0.
[11] WnR
Write not Read bit. This field indicates whether a write or a read access caused the abort:
0Abort caused by a read access.
1Abort caused by a write access.
For faults on CP15 cache maintenance operations, including the VA to PA translation operations, this bit always returns a value of 1.
[10] - Reserved, RES0.
[9] LPAE
Large physical address extension. The value of the format descriptor is:
1Long-descriptor translation table formats.
[8:6] - Reserved, RES0.
[5:0] Status
Fault Status bits. This field indicates the type of exception generated. The possible values are:
0b0000LLAddress size fault, LL bits indicate level.
0b0001LLTranslation fault, LL bits indicate level.
0b0010LLAccess flag fault, LL bits indicate level.
0b0011LLPermission fault, LL bits indicate level.
0b010000Synchronous external abort.
0b011000Synchronous parity error on memory access.
0b010001Asynchronous external abort.
0b011001Asynchronous parity error on memory access.
0b0101LLSynchronous external abort on translation table walk, LL bits indicate level.
0b0111LLSynchronous parity error on memory access on translation table walk, LL bits indicate level.
0b100001Alignment fault.
0b100010Debug event.
All other values are reserved.
The following table shows how the LL bits in the Status field encode the lookup level associated with the MMU fault.

Table 4-129 Encodings of LL bits associated with the MMU fault

LL bits Meaning
00 Level 0 fault
01 First level
10 Second level
11 Third level
To access the DFSR in AArch32 state, read or write the CP15 register with:
MRC p15, 0, <Rt>, c5, c0, 0; Read Data Fault Status Register
MCR p15, 0, <Rt>, c5, c0, 0; Write Data Fault Status Register
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