1.4 Interfaces

The Cortex-A72 processor has the following external interfaces:

  • Memory interface that implements either an ACE or CHI interface.
  • Optional ACP that implements an AXI slave interface.
  • Optional GIC CPU interface that implements an AXI4-Stream interface
  • Debug interface that implements an APB slave interface.
  • Trace interface that implements an ATB interface.
  • PMU interface.
  • Generic Timer interface.
  • Cross trigger interface.
  • Power management interface.
  • Design For Test (DFT).
  • Memory Built-In Self Test (MBIST).
See 2.2 Interfaces for more information.
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