1.7.2 Design flow
The Cortex-A72 processor is delivered as synthesizable RTL. Before the processor can be used in a product, it must go through the following process:
- The implementer configures and synthesizes the RTL to produce a hard macrocell. This
might include integrating the cache RAMs into the design.
- The integrator connects the configured design into a SoC. This includes connecting it
to a memory system and peripherals.
This is the last process. The system programmer develops the:
- Software to configure the Cortex-A72 processor.
- Software to initialize the Cortex-A72 processor.
- Application software and the SoC tests.
- Can be performed by a different party.
- Can include implementation and integration choices that affect the behavior and features
of the processor.
The operation of the final device depends on:
- Build configuration
The implementer chooses the options that affect how the RTL source files are
preprocessed. These options usually include or exclude logic that can affect one or
more of the area, maximum frequency, and features of the resulting macrocell.
- Configuration inputs
- The integrator configures some features of the processor by tying inputs to
specific values. These configurations affect the start-up behavior before any software
configuration is made. They can also limit the options available to the software.
- Software configuration
- The programmer configures the processor by programming particular values into
registers. This affects the behavior of the processor.
This manual refers to IMPLEMENTATION DEFINED features that apply to build
configuration options. Reference to a feature that is included means that the appropriate
build and signal configuration options have been selected. Reference to an enabled feature
means that the feature has also been configured by software.