5.5 MMU enabling and disabling

You can enable or disable the MMU. See the ARM Architecture Reference Manual ARMv8 for more information.

You must set CPUECTLR.SMPEN to 1 before the caches and MMU are enabled, or any instruction cache or TLB maintenance operations are performed.
Related information
4.3.67 CPU Extended Control Register, EL1
Non-ConfidentialPDF file icon PDF versionARM 100095_0002_04_en
Copyright © 2014-2016 ARM. All rights reserved.