The EDITCTRL characteristics are:
- Enables the external debug to switch from its default mode into
integration mode, where test software can control directly the inputs and outputs of the
processor, for integration testing or topology detection.
- Usage constraints
Accessible through the internal memory-mapped
interface and the external debug interface. The access conditions are:
- EDITCTRL is in the Core power domain.
- See 10.7 Memory-mapped register summary.
The following figure shows the EDITCTRL bit assignments.
Figure 10-11 EDITCTRL bit assignments
The following table shows the EDITCTRL bit assignments.
Table 10-15 EDITCTRL bit assignments
When IME is set to 1, the device
reverts to an integration mode to enable integration testing or topology
|1||Integration mode enabled.