11.7.3 Performance Monitors Context ID Sample Register

The PMCIDSR characteristics are:
Purpose
The PMCIDSR register is an alias of the EDCIDSR debug register. Reads of the PMCIDSR return a copy of the EDCIDSR debug register.
Usage constraints
The external accessibility to the PMCIDSR by condition code is:
Off DLK OSLK EPMAD SLK Default
Error Error RO RO RO RO
Table 11-1 External register access conditions describes the condition codes.
Configurations
There is no configuration information for PMCIDSR.
Attributes
See the register summary in Table 11-7 Memory-mapped PMU register summary.
See the ARM® Architecture Reference Manual ARMv8 for more information about the EDCIDSR debug register.
PMCIDSR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x608.
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