The PMSSR characteristics are:
- Provides status information on whether the PMU counters have been
- Usage constraints
The external accessibility to the PMSSR by
condition code is:
A security violation prevents the capture of the event counters.
The external monitor must keep track of whether the snapshot
registers were captured by the processor.
To prevent loss of data, software must save and restore the PMU
state, including the PMSCR and PMSRR registers, when capturing over a reset or power
- There is no configuration information for PMSSR.
- See the register summary in Table 11-7 Memory-mapped PMU register summary.
The following figure shows the PMSSR bit assignments.
Figure 11-5 PMSSR bit assignments
The following table shows the PMSSR bit assignments.
Table 11-9 PMSSR bit assignments
No capture. The possible values
|0||PMU counters captured.
|1||PMU counters not captured.
The NC bit:
- Is reset to 1 by a Warm reset but overwritten at the first
- Does not reflect the status of the captured Program Counter
PMSSR can be accessed through the internal memory-mapped interface and the
external debug interface, offset