13.7.36 Trace Device Affinity register 1

The TRCDEVAFF1 characteristics are:
Purpose
The value is a read-only copy of MPIDR_EL1[63:32] as seen from EL3, unaffected by VMPIDR_EL2.
Usage constraints
Accessible only from the memory-mapped interface or from an external agent such as a debugger.
Configurations
Available in all configurations.
Attributes
A 32-bit RO management register.
For the Cortex-A72 processor, MPIDR_EL1[63:32] is RES0.
The TRCDEVAFF1 can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xFAC.
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