B.2.3 Address matching breakpoint on A32 instruction with DBGBCRn.BAS=1100

An address match occurs, unless the instruction is the first instruction within an instruction fetch, that is the first instruction in a 128-bit aligned region for a sequential fetch, or first instruction following a taken branch. In this case the breakpoint is taken on the following instruction.
Non-ConfidentialPDF file icon PDF versionARM 100095_0002_04_en
Copyright © 2014-2016 ARM. All rights reserved.