Using this book

This book is organized into the following chapters:

Part A Introduction

Chapter A1 Introduction

This chapter introduces the Cortex®‑M33 processor and its features, configurable options, and product documentation.

Part B Functional description

Chapter B1 Programmers Model

This chapter describes the Cortex®‑M33 processor register set, modes of operation, and provides other information for programming the processor.

Chapter B2 System Control

This chapter describes registers that contain IMPLEMENTATION DEFINED information or functionality.

Chapter B3 Security Attribution and Memory Protection

This chapter describes the security attribution and memory protection facilities that the Cortex®‑M33 processor provides.

Chapter B4 Nested Vectored Interrupt Controller

This chapter describes the Nested Vectored Interrupt Controller (NVIC).

Chapter B5 Floating-Point Unit

This chapter describes the Floating-Point Unit (FPU).

Chapter B6 External coprocessors

This chapter describes the external coprocessors.

Part C Debug and trace components

Chapter C1 Debug

This chapter summarizes the debug system.

Chapter C2 Instrumentation Trace Macrocell Unit

This chapter describes the Instrumentation Trace Macrocell (ITM) unit.

Chapter C3 Data Watchpoint and Trace Unit

This chapter describes the Data Watchpoint and Trace (DWT) unit.

Chapter C4 Cross Trigger Interface

This chapter describes the Cross Trigger Interface (CTI).

Chapter C5 Breakpoint Unit

This section describes the Breakpoint Unit (BPU).

D Appendices

Appendix A Debug Access Port

This appendix describes the DAP for the Cortex®‑M33 processor.

Appendix B Trace Port Interface Unit

This appendix describes the Cortex®‑M33 TPIU that can be used with the Cortex‑M33 processor.

Appendix C UNPREDICTABLE Behaviors

This appendix summarizes the behavior of the Cortex®‑M33 processor in cases where the Armv8‑M architecture is unpredictable.

Appendix D Revisions

This appendix describes the technical changes between released issues of this book.

Glossary

The Arm® Glossary is a list of terms used in Arm documentation, together with definitions for those terms. The Arm Glossary does not contain terms that are industry standard unless the Arm meaning differs from the generally accepted meaning.

See the Arm® Glossary for more information.

Typographic conventions

italic
Introduces special terminology, denotes cross-references, and citations.
bold
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monospace
Denotes text that you can enter at the keyboard, such as commands, file and program names, and source code.
monospace
Denotes a permitted abbreviation for a command or option. You can enter the underlined text instead of the full command or option name.
monospace italic
Denotes arguments to monospace text where the argument is to be replaced by a specific value.
monospace bold
Denotes language keywords when used outside example code.
<and>
Encloses replaceable terms for assembler syntax where they appear in code or code fragments. For example:
 ADD Rd, SP, #<imm>
SMALL CAPITALS
Used in body text for a few terms that have specific technical meanings, that are defined in the Arm® Glossary. For example, IMPLEMENTATION DEFINED, IMPLEMENTATION SPECIFIC, UNKNOWN, and UNPREDICTABLE.
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