|Single-precision floating-point only.
||No Armv8‑M DSP Extension.
DSP Extension supported, including the following instruction classes:
- Pack halfword.
- Reverse bits/bytes.
- Select bytes.
- Sum of absolute differences.
- SIMD arithmetic.
- Extended signed multiplies with overflow
- Extended signed multiplies with optional
- SIMD multiplies with overflow
- Extended unsigned multiply.
||No Armv8‑M Security Extension.
| Non-secure protected memory regions
||0 region, 4 regions, 8 regions, 12 regions, or 16
| Secure protected memory regions
||0 region, 4 regions, 8 regions, 12 regions, or 16 regions when the
Armv8‑M Security Extension is included.
Security Attribution Unit (SAU)
||0 region, 4 regions, or 8 regions when the Armv8‑M Security Extension is included.
||1-480 interrupts. To support non-contiguous mapping, you can remove
|Number of bits of interrupt priority
||Between three and eight bits of interrupt priority, between 8 and 256
levels of priority implemented.
|Debug watchpoints and
||Minimal debug. No Halting debug or memory and peripheral access.
|Reduced set. Two data watchpoint comparators and four breakpoint
|Full set. Four data watchpoint comparators and eight breakpoint
|ITM and Data
Watchpoint and Trace (DWT) trace functionality
||No ITM or DWT trace.
|Complete ITM and DWT trace.
||No ETM support.
|ETM instruction execution trace.
|Micro Trace Buffer
||No MTB support.
|MTB instruction trace.
Interrupt Controller (WIC)
||No WIC controller.
|WIC controller included.
||No support for coprocessor hardware.
|Support for coprocessor hardware.