B4.1.2 Interrupt Controller Type Register

The ICTR register shows the number of interrupt lines that the NVIC supports.

Usage Constraints
There are no usage constraints.
Configurations
This register is available in all processor configurations.
Attributes
See the register summary information.

The following figure shows the ICTR bit assignments.

Figure B4-1 ICTR bit assignments
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The following table shows the ICTR bit assignments.

Table B4-2 ICTR bit assignments

Bits Name Function Notes
[31:4] - Reserved. -
[3:0] INTLINESNUM

Total number of interrupt lines in groups of 32:

0b0000 = 1...32

0b0001 = 33...64

0b0010 = 65...96

0b0011 = 97...128

0b0100 = 129...160

0b0101 = 161...192

0b0110 = 193...224

0b0111 = 225...256

0b1000 = 257...288

0b1001 = 289...320

0b1010 = 321...352

0b1011 = 353...384

0b1100 = 385...416

0b1101 = 417...448

0b1110 = 449...480

The processor supports a maximum of 480 external interrupts.

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