A1.4.3 Floating-Point Unit
The FPU provides:
- Instructions for single-precision (C programming language
float type) data-processing
- Instructions for double-precision (C
double type) load and store operations.
- Combined multiply-add instructions for increased precision (Fused
- Hardware support for conversion, addition, subtraction, multiplication
with optional accumulate, division, and square-root.
- Hardware support for denormals and all IEEE Standard 754-2008 rounding
- 32 32-bit single-precision registers or 16 64-bit double-precision
- Lazy floating-point context save. Automated stacking of floating-point
state is delayed until the ISR attempts to execute a floating-point instruction. This
reduces the latency to enter the ISR and removes floating-point context save for ISRs that
do not use floating-point.