C1.1.1 CoreSight™ discovery

For processors that implement debug, Arm® recommends that a debugger identifies and connects to the debug components using the CoreSight™ debug infrastructure.

See the CoreSight™ Components Technical Reference Manual for more information.

Arm recommends that a debugger follows the flow in the following figure to discover the components present in the CoreSight debug infrastructure. In this case, for each CoreSight component in the CoreSight system, a debugger reads:

Figure C1-1 CoreSight discovery
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To identify the Cortex®‑M33 processor and debug components within the CoreSight system, Arm recommends that a debugger perform the following actions:

  1. Locate and identify the Cortex‑M33 Processor ROM table using its CoreSight identification.
  2. Follow the pointers in the Cortex‑M33 Processor ROM table to identify the presence of the following components:

    1. Cross Trigger Interface (CTI).
    2. Embedded Trace Macrocell (ETM)
    3. Micro Trace Buffer (MTB).
    4. System Control Space (SCS).
    5. Instrumentation Trace Macrocell (ITM).
    6. Breakpoint Unit (BPU).
    7. Data Watchpoint Unit (DWT).
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