B2.3 CPUID Base Register

The CPUID Register specifies the ID number, the version number, and implementation details of the processor core.

Usage Constraints

Privileged access permitted only. Unprivileged accesses generate a fault.

This register is word accessible only, sub-word transactions are UNPREDICTABLE.

Configurations
This register is always implemented.
Attributes
Described in the System control registers table.

The following figure shows the CPUID bit assignments.

Figure B2-1 CPUID bit assignments
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The following table shows the CPUID bit assignments.

Table B2-2 CPUID bit assignments

Bits NAME Function
[31:24] IMPLEMENTER Indicates implementer: 0x41 = Arm®
[23:20] VARIANT Indicates processor revision: 0x0 = Revision 0
[19:16] (Constant) Reads as 0xF
[15:4] PARTNO Indicates part number: 0xD21 = Cortex®‑M33
[3:0] REVISION Indicates patch release: 0x4 = Patch 4
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