C2.1.2 ITM Trace Privilege Register

The ITM_TPR enables an operating system to control the stimulus ports that are accessible by user code.

Usage constraints
You can only write to this register in privileged mode.
This register is available if the ITM is configured in your implementation.
See the ITM register summary table.

The following figure shows the ITM_TPR bit assignments.

Figure C2-1 ITM_TPR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following table shows the ITM_TPR bit assignments.

Table C2-2 ITM_TPR bit assignments

Bits Name Function
[31:4] - Reserved.

Bit mask to enable tracing on ITM stimulus ports:

Bit[0]Stimulus ports [7:0].
Bit[1]Stimulus ports [15:8].
Bit[2]Stimulus ports [23:16].
Bit[3]Stimulus ports [31:24].
Non-ConfidentialPDF file icon PDF version100230_0004_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.