B5.2.1 FPU views of the register bank

The FPU provides an extension register file containing 32 single-precision registers.

The registers can be viewed as:

For more information about the FPU, see the Armv8‑M Architecture Reference Manual.

The modes of operation are controlled using the Floating-Point Status and Control Register, FPSCR. For more information about the FPSCR, see the Armv8‑M Architecture Reference Manual.

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