C2.1.3 ITM Integration Mode Control Register

The ITM_ITCTRL controls whether the trace unit is in integration mode.

Usage constraints
  • Accessible only from the memory-mapped interface or from an external agent such as a debugger.
  • Arm® recommends that you perform a debug reset after using integration mode.
ConfigurationsAvailable in all configurations.
AttributesA 32-bit management register. See also the register summary table.

The following figure shows the ITM_ITCTRL bit assignments.

Figure C2-2 ITM_ITCTRL bit assignments
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The following table shows the ITM_ITCTRL bit assignments.

Table C2-3 ITM_ITCTRL bit assignments

Bits Name Function
[31:1] -

Reserved, res0.

[0] IME

Integration mode enable bit. The possible values are:

0The trace unit is not in integration mode.
1

The trace unit is in integration mode. This mode enables:

  • A debug agent to perform topology detection.
  • SoC test software to perform integration testing.

The ITM_ITCTRL register can be accessed through the external debug interface, at address 0xE0000F00.

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