B6.4 Data transfer rates

The following table shows the ideal data transfer rates for the coprocessor interface. This means that the coprocessor responds immediately to an instruction. The ideal data transfer rates are sustainable if the corresponding coprocessor instructions are executed consecutively.

Table B6-1 Data transfer rates

Instructions Direction Ideal data rate
MCR, MCR2 Processor to coprocessor 32 bits per cycle
MRC, MRC2 Coprocessor to processor 32 bits per cycle
MCRR, MCRR2 Processor to coprocessor 64 bits per cycle
MRRC, MRRC2 Coprocessor to processor 64 bits per cycle
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