A1.8 Documentation

The Cortex®‑M33 processor documentation can help you complete the top-level processes of implementation, integration, and programming that are required to use the product correctly.

The Cortex‑M33 processor documentation comprises a Technical Reference Manual, an Integration and Implementation Manual, and User Guide Reference Material.

Technical Reference Manual

The Technical Reference Manual (TRM) describes the functionality and the effects of functional options on the behavior of the Cortex‑M33 processor. It is required at all stages of the design flow. Some behavior described in the TRM might not be relevant because of the way that the Cortex‑M33 processor is implemented and integrated. If you are programming the Cortex‑M33 processor, then contact the implementer to determine:

  • The build configuration of the implementation.
  • What integration, if any, was performed before implementing the processor.
Integration and Implementation Manual

The Integration and Implementation Manual (IIM) describes:

  • The available build configuration options and related issues in selecting them.
  • How to configure the Register Transfer Level (RTL) with the build configuration options.
  • How to integrate the processor into a SoC. This includes a description of the integration kit and describes the pins that the integrator must tie off to configure the macrocell for the required integration.
  • The processes to sign off the integration and implementation of the design.

The Arm® product deliverables include reference scripts and information about using them to implement your design.

Reference methodology documentation from your EDA tools vendor complements the IIM.

The IIM is a confidential book that is only available to licensees.

User Guide Reference Material

This document provides reference material that Arm partners can configure and include in a User Guide for an Arm Cortex‑M33 processor. Typically:

  • Each chapter in this reference material might correspond to a section in the User Guide.
  • Each top-level section in this reference material might correspond to a chapter in the User Guide.

However, you can organize this material in any way, subject to the conditions of the license agreement under which Arm supplied the material.

See the Additional reading section for more information about the books that are associated with the Cortex‑M33 processor.

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