B.2 TPIU functional description

The TPIU supports up to two ATB ports.

The ATB1 and ATB2 parameters provide the following configuration options:

ATB2 = 0 and ATB1 = 0Illegal combination
ATB2 = 0 and ATB1 = 1ATB port 1 present
ATB2 = 1 and ATB1 = 0ATB port 2 present
ATB2 = 1 and ATB1 = 1Both ATB port 1 and 2 present

In a system, Arm® recommends that the ITM is connected to ATB port 1 and an ETM is connected to ATB port 2.

If your implementation requires no trace support, then the TPIU might not be present.

Note:

If your system design uses the optional ETM component, the TPIU configuration supports both ITM and ETM debug trace. See the Arm® CoreSight™ ETM‑M33 Technical Reference Manual.

The following figure shows the component layout of the TPIU for both configurations.

Figure B-1 TPIU block diagram
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If only one ATB slave port is present, it is assigned to ATB interface 1 and ATB interface 2 is removed. If ATB slave ports 1 and 2 are present, they are assigned to ATB interface 1 and 2 respectively.

This section contains the following subsections:
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