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If the Cortex®‑M33 Floating Point Unit (FPU) is in a separate power domain, the way the FPU domain is powered down depends on whether the FPU domain includes state retention logic.
To power down the FPU:
If FPU domain includes state retention logic, disable the FPU by clearing the CPACR.CP10 and CPACR.CP11 bitfields.
If FPU domain does not include state retention logic, disable the FPU by clearing the CPACR.CP10 and CPACR.CP11 bitfields and set both the CPPWR.SU10 and CPPWR.SU11 bitfields to 1.