B1.2 Modes of operation and execution
The Cortex®‑M33 processor supports Secure and Non-secure security states, Thread and Handler operating modes, and can run in either Thumb or Debug operating states. In addition, the processor can limit or exclude access to some resources by executing code in privileged or unprivileged mode.
See the Armv8‑M Architecture Reference
more information about the modes of operation and execution.
- Security states
- When the Armv8‑M Security Extension is included in the processor, the
programmers model includes two orthogonal security states, Secure state and
Non-secure state. When the Security Extension is implemented, the processor
always resets into Secure state. When the security state is not implemented,
the processor resets into Non-secure state. Each security state includes a
set of independent operating modes and supports both privileged and
unprivileged user access. Registers in the System Control Space are banked
across Secure and Non-secure state, with the Non-secure register view
available at an aliased address to Secure state. When the Armv8‑M
Security Extension is not included in the processor, the programmers model
includes only the Non-secure state.
- Operating modes
For each security state, the processor can operate in Thread or Handler
mode. The conditions which cause the processor to enter Thread or
Handler mode are as follows:
- The processor enters Thread mode on reset, or as a
result of an exception return to Thread mode. Privileged and
Unprivileged code can run in Thread mode.
- The processor enters Handler mode as a result of an
exception. All code is privileged in Handler mode.
The processor can change security state on taking an exception, for example
when a Secure exception is taken from Non-secure state, the Thread mode
enters the Secure state Handler mode.
The processor can also call Secure functions from Non-secure state and Non-secure
functions from Secure state. The Security Extension includes
requirements for these calls to prevent secure data from being accessed
in Non-secure state.
- Operating states
The processor can operate in Thumb® or Debug state:
- Thumb state is the state of normal execution running
16-bit and 32-bit halfword-aligned Thumb instructions.
- Debug state is the state when the processor is in Halting debug.
- Privileged access and unprivileged user access
- Code can execute as privileged or unprivileged. Unprivileged execution
limits or excludes access to some resources appropriate to the current
security state. Privileged execution has access to all resources available
to the security state. Handler mode is always privileged. Thread mode can be
privileged or unprivileged.