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The ETM-M33 uses event selectors to control resources.
The ETM-M33 controls the following resources:
An event selector is configured to be sensitive to a resource selector pair, and one resource selector pair can control more than one event selector. The event selectors for Cortex®‑M33 are located in registers TRCEVENTCTL0R, TRCCNTCTLRn, TRCTSCTLR, and TRCVICTLR.
The ETM-M33 provides one fixed resource selector pair, registers TRCRSCTLR0 and TRCRSCTLR1 with respective static values of 0 = FALSE and 1 = TRUE, and one configurable resource selector pair, registers TRCRSCTLR2 and TRCRSCTLR3. A resource selector pair enables up to two resource groups to be selected, and enables one or more resources to be selected in each group. If more than one resource is selected, the outputs of the selected resources are OR-gated.
See the ARM® Embedded Trace Macrocell Architecture Specification ETMv4 for more information.
The following table shows the resources that can be selected for the Instruction trace.
Table A2-3 Instruction trace resource selection
||0-3||External input selectors 0-3|
Inputs from Processor DWT comparators Element 0-3
||0||Counter at zero 0|
||0||Single-Shot Comparator control 0|
For example, the following figure shows the steps necessary to use a Single-Shot comparator to generate a trigger event and an ATB trigger. This example uses the user-configurable resource selector 2.
The Data Watchpoint and Trace (DWT) unit in the processor control the processor comparator inputs.
The ETM-M33 single shot and start-stop logic, when present, might not reliably trigger where DWT comparators are programmed for comparisons other than instruction address comparison.