B1.19 ID Register 2

The TRCIDR2 indicates the maximum sizes of certain aspects of items in the trace.

Usage constraints
There are no usage constraints.
Available in all configurations.
See the register summary in Table B1-1 ETM-M33 register summary and Table B1-5 Implementation specific and identification registers.

The following figure shows the TRCIDR2 bit assignments.

Figure B1-22 TRCIDR2 bit assignments
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The following table shows the TRCIDR2 bit assignments.

Table B1-32 TRCIDR2 bit assignments

Bits Name Function
[31:29] - res0.
[28:25] CCSIZE Indicates the size of the cycle counter in bits minus 12:
0b0000Cycle count is 12 bits in length.
[24:20] DVSIZE Data value size in bytes:
0b00000Data value size not supported.
[19:15] DASIZE Data address size in bytes:
0b00000Data address size not supported.
[14:10] VMIDSIZE Virtual Machine ID size:
0b00000Virtual Machine ID tracing not implemented.
[9:5] CIDSIZE Context ID tracing:
0b00000Context ID tracing not implemented.
[4:0] IASIZE Instruction address size:
0b00100Maximum of 32-bit address size.
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