B1.22 ID Register 5

The TRCIDR5 indicates the available ETM-M33 resources.

Usage constraints
There are no usage constraints.
Available in all configurations.
See the register summary in Table B1-1 ETM-M33 register summary and Table B1-5 Implementation specific and identification registers.

The following figure shows the TRCIDR5 bit assignments.

Figure B1-25 TRCIDR5 bit assignments
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The following table shows the TRCIDR5 bit assignments.

Table B1-35 TRCIDR5 bit assignments

Bits Name Function
[31] REDFUNCNTR Reduced Function Counter implemented:
1Counter 0 is implemented as a Reduced Function Counter.
[30:28] NUMCNTR Number of counters implemented:
0b001One counter implemented.
[27:25] NUMSEQSTATE Number of sequencer states implemented:
0b000No sequencer states implemented.
[24] - res0.
[23] LPOVERRIDE Low-power state override support:
1Low-power state override support implemented.
[22] ATBTRIG ATB trigger support:
1ATB trigger support implemented.
[21:16] TRACEIDSIZE Number of bits of trace ID:
0x07Seven-bit trace ID implemented.
[15:12] - res0.
[11:9] NUMEXTINSEL Number of external input selectors implemented:
0b000No external input selectors are implemented.
[8:0] NUMEXTIN Number of external inputs implemented:
0x4Four external inputs implemented.
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