B1.26 Single-shot Processor Comparator Input Control Register

The TRCSSPCICR0 selects the processor comparator inputs for Single-shot control.

Usage constraints
Can only be written when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See the register summary in Table B1-1 ETM-M33 register summary and Table B1-7 Single-shot comparator registers.

The following figure shows the TRCSSPCICR0 bit assignments.

Figure B1-29 TRCSSPCICR0 bit assignments
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The following table shows the TRCSSPCICR0 bit assignments.

Table B1-39 TRCSSPCICR0 bit assignments

Bits Name Function
[31:4] - res0.
[3:0] PC

Selects one or more processor comparator inputs for Single-shot control.

One bit is provided for each processor comparator input. The number of comparator inputs can be either two or four.

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