B1.18 ID Register 1

The TRCIDR1 indicates the ETM-M33 architecture.

Usage constraints
There are no usage constraints.
Available in all configurations.
See the register summary in Table B1-1 ETM-M33 register summary and Table B1-5 Implementation specific and identification registers.

The following figure shows the TRCIDR1 bit assignments.

Figure B1-21 TRCIDR1 bit assignments
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The following table shows the TRCIDR1 bit assignments.

Table B1-31 TRCIDR1 bit assignments

Bits Name Function
[31:24] DESIGNER Indicates the designer of the trace unit:
[23:16] - res0.
[15:12] - res1.
[11:8] TRCARCHMAJ Major trace unit architecture version number:
[7:4] TRCARCHMIN Minor trace unit architecture version number:
0b0010Minor revision 2.
[3:0] REVISION Implementation revision number:
0b0010Implementation revision 2.
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