B1.29 Integration test registers

The ETM-M33 contains integration test registers. These can be used to access some of the ports that are useful in determining the system level trace topology by identifying the integration between specific components. Because the integration mode overrides the normal bus protocols, the ETM and ATB interconnect must be reset when any topology detection has been performed. Integration test registers are used to set the outputs and read the state of some of the signals.

To access the integration test registers, you must first set bit[0] of the B1.29.4 Integration Mode Control Register to 1.

  • You can use the write-only Integration test registers to set the outputs of some of the ETM-M33 signals. The following table shows the signals that can be controlled in this way.

Table B1-42 Output signals that the integration test registers can control

Signal Register Bits Register description
AFREADYMI TRCITIATBOUTR [1] B1.29.3 Integration Instruction ATB Out Register
ATIDMI[6:0] TRCITATBIDR [6:0] B1.29.1 Integration ATB Identification Register
ATVALIDMI TRCITIATBOUTR [0] B1.29.3 Integration Instruction ATB Out Register
  • You can use the read-only integration test registers to read the state of some of the ETM-M33 input signals. The following table shows the signals that can be read in this way.

Table B1-43 Input signals that the integration test registers can read

Signal Register Bits Register description
AFVALIDMI TRCITIATBINR [1] B1.29.2 Integration Instruction ATB In Register
ATREADYMI TRCITIATBINR [0] B1.29.2 Integration Instruction ATB In Register

See the ARM® Embedded Trace Macrocell Architecture Specification ETMv4 for more information about TRCITCTRL.

This section contains the following subsections:
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