B1.2 Programming Control Register

The TRCPRGCTLR enables ETM-M33.

Usage constraints
See A3.2.1 Controlling ETM-M33 programming.
Available in all configurations.
See the register summary in Table B1-1 ETM-M33 register summary and Table B1-2 General control and ID registers.

The following figure shows the TRCPRGCTLR bit assignments.

Figure B1-1 TRCPRGCTLR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following table shows the TRCPRGCTLR bit assignments.

Table B1-11 TRCPRGCTLR bit assignments

Bits Name Function
[31:1] - res0.
[0] EN

Trace unit enable bit:

0The trace unit is disabled.
1The trace unit is enabled.
Non-ConfidentialPDF file icon PDF versionARM 100232_0002_00_en
Copyright © 2016, 2017 ARM Limited or its affiliates. All rights reserved.