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The TRCPDSR indicates the power down status of the ETM-M33.
The following figure shows the TRCPDSR bit assignments.
The following table shows the TRCPDSR bit assignments.
Table B1-41 TRCPDSR bit assignments
|||STICKYPD||Sticky power down state.
This bit is set to 1 when power to the ETM-M33 registers is removed, to indicate that programming state has been lost. It is cleared after a read of the TRCPDSR.
|||POWER||Indicates ETM-M33 is powered up:
If a system implementation allows ETM-M33 to be powered down independently of the debug power domain, the system must ensure: