Part B ETM-M33 Register Descriptions

Table of Contents

B1 ETM-M33 registers
B1.1 Register summary
B1.1.1 General control and ID registers
B1.1.2 Trace filtering control register
B1.1.3 Derived resource register
B1.1.4 Implementation specific and identification registers
B1.1.5 Resource selection register
B1.1.6 Single-shot comparator registers
B1.1.7 Power control registers
B1.1.8 Integration test registers
B1.1.9 CoreSight management registers
B1.2 Programming Control Register
B1.3 Status Register
B1.4 Trace Configuration Register
B1.5 Auxiliary Control Register
B1.6 Event Control 0 Register
B1.7 Event Control 1 Register
B1.8 Stall Control Register
B1.9 Global Timestamp Control Register
B1.10 Synchronization Period Register
B1.11 Cycle Count Control Register
B1.12 Trace ID Register
B1.13 ViewInst Main Control Register
B1.14 Counter Reload Value Registers 0
B1.15 ID Register 8-13
B1.16 Implementation Specific Register 0
B1.17 ID Register 0
B1.18 ID Register 1
B1.19 ID Register 2
B1.20 ID Register 3
B1.21 ID Register 4
B1.22 ID Register 5
B1.23 Resource Selection Registers 2-3
B1.24 Single-shot Comparator Control Register 0
B1.25 Single-shot Comparator Status Register 0
B1.26 Single-shot Processor Comparator Input Control Register
B1.27 Power Down Control Register
B1.28 Power Down Status Register
B1.29 Integration test registers
B1.29.1 Integration ATB Identification Register
B1.29.2 Integration Instruction ATB In Register
B1.29.3 Integration Instruction ATB Out Register
B1.29.4 Integration Mode Control Register
B1.30 Claim Tag Set Register
B1.31 Claim Tag Clear Register
B1.32 Authentication Status Register
B1.33 Device Architecture Register
B1.34 Device ID Register
B1.35 Device Type Register
B1.36 Peripheral Identification Registers
B1.37 Component Identification Registers
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