2.2 AArch64 register summary

The processor has several Advanced SIMD and floating-point system registers in the AArch64 execution state. Each register has a specific purpose, specific usage constraints, configurations, and attributes.

The following table gives a summary of the Cortex®‑A35 processor Advanced SIMD and floating-point system registers in the AArch64 execution state.

Table 2-2 AArch64 Advanced SIMD and floating-point system registers

Name Type Reset Description
FPCR RW 0x00000000 See 2.3 Floating-point Control Register.
FPSR RW 0x00000000 See 2.4 Floating-point Status Register.
MVFR0_EL1 RO 0x10110222 See 2.5 Media and VFP Feature Register 0.
MVFR1_EL1 RO 0x12111111 See 2.6 Media and VFP Feature Register 1.
MVFR2_EL1 RW 0x00000043 See 2.7 Media and VFP Feature Register 2.
FPEXC32_EL2 RW 0x00000700 See 2.8 Floating-point Exception Control Register
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