|Non-Confidential||PDF version||ARM 100241_0001_00_en|
|Home > Functional Description > Cache Behavior and Cache Protection > Invalidating or cleaning a cache|
The processor automatically invalidates caches on reset unless suppressed with the DBGL1RSTDISABLE or L2RSTDISABLE pins. It is therefore not necessary for software to invalidate the caches on start-up.
DCIMVAC operations perform an invalidate of the target address. If the data is dirty within the cluster then a clean is performed before the invalidate.
DCISW operations perform both a clean and invalidate of the target set/way. The values of HCR.SWIO and HCR_EL2.SWIO have no effect.
The ARMv8-A architecture does not support an operation to invalidate the entire data cache. If this function is required in software, it must be constructed by iterating over the cache geometry and executing a series of individual invalidate by set/way instructions.