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The STANDBYWFI[n] signal indicates when an individual core is in idle and low-power state. The power management controller can remove power from an individual core when STANDBYWFI[n] is asserted.
The STANDBYWFIL2 signal indicates when all individual cores and the L2 memory system are in idle and low-power state. A power management controller can remove power from the Cortex®‑A32 processor when STANDBYWFIL2 is asserted. See A4.8 Powering down the processor without system driven L2 flush and A4.10 Powering down the processor with system driven L2 flush for more information.
The Cortex‑A32 processor includes a minimal L2 memory system in configurations without an L2 cache. Therefore, the power management controller must always wait for assertion of STANDBYWFIL2 before removing power from the Cortex‑A32 processor. This applies to configurations that use the mini-SCU and configurations that use the SCU.
The following figure shows how STANDBYWFI[3:0] and STANDBYWFIL2 correspond to individual cores and the Cortex‑A32 processor.