B1.15 c12 registers

The processor can access different 32-bit wide system registers. Registers where CRn has the value twelve are called c12 registers.

The following table shows the 32-bit wide system registers you can access when the processor is in AArch32 state and the value of CRn is c12.

Table B1-14 c12 register summary

Op1 CRm Op2 Name Reset Description
0 c0 0 VBAR

0x00000000

B1.119 Vector Base Address Register.

0x00000000 is the secure reset value and UNK is the non-secure reset value.

1 MVBAR UNK

Monitor Vector Base Address Register. See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information.

2 RMR 0x00000000 B1.103 Reset Management Register.
c1 0 ISR UNK B1.90 Interrupt Status Register.
c8 0 ICC_IAR0 - Interrupt Acknowledge Register 0
1 ICC_EOIR0 - End Of Interrupt Register 0
2 ICC_HPPIR0 - Highest Priority Pending Interrupt Register 0
3 ICC_BPR0 0x00000002 Binary Point Register 0
4 ICC_AP0R0 0x00000000 Active Priorities 0 Register 0
c9 0 ICC_AP1R0 0x00000000 Active Priorities 1 Register 0
c11 1 ICC_DIR - Deactivate Interrupt Register
3 ICC_RPR - Running Priority Register
c12 0 ICC_IAR1 - Interrupt Acknowledge Register 1
1 ICC_EOIR1 - End Of Interrupt Register 1
2 ICC_HPPIR1 - Highest Priority Pending Interrupt Register 1
3 ICC_BPR1 0x00000003

Binary Point Register 1

This is the reset value in non-secure state. In secure state, the reset value is 0x00000002.

4 ICC_CTLR 0x00000400 Interrupt Control Register
5 ICC_SRE 0x00000000 System Register Enable Register
6 ICC_IGRPEN0 0x00000000 Interrupt Group Enable Register 0
7 ICC_IGRPEN1 0x00000000 Interrupt Group Enable Register 1
4 c0 0 HVBAR UNK B1.71 Hyp Vector Base Address Register.
c8 0 ICH_AP0R0 0x00000000 Interrupt Controller Hyp Active Priorities Register (0,0)
c9 0 ICH_AP1R0 0x00000000 Interrupt Controller Hyp Active Priorities Register (1,0)
4 ICH_VSEIR 0x00000000 Interrupt Controller Virtual System Error Interrupt Register
5 ICC_HSRE 0x00000000 System Register Enable Register for EL2
c11 0 ICH_HCR 0x00000000 Interrupt Controller Hyp Control Register
1 ICH_VTR 0x90080003 Interrupt Controller VGIC Type Register
2 ICH_MISR 0x00000000 Interrupt Controller Maintenance Interrupt State Register
3 ICH_EISR 0x00000000 Interrupt Controller End of Interrupt Status Register
7 ICH_VMCR 0x004C0000 Interrupt Controller Virtual Machine Control Register
5 ICH_ELRSR 0x0000000F Interrupt Controller Empty List Register Status Register
c12 0 ICH_LR0 0x00000000 Interrupt Controller List Register 0
1 ICH_LR1 0x00000000 Interrupt Controller List Register 1
2 ICH_LR2 0x00000000 Interrupt Controller List Register 2
3 ICH_LR3 0x00000000 Interrupt Controller List Register 3
c14 0 ICH_LRC0 0x00000000 Interrupt Controller List Register 0
1 ICH_LRC1 0x00000000 Interrupt Controller List Register 1
2 ICH_LRC2 0x00000000 Interrupt Controller List Register 2
3 ICH_LRC3 0x00000000 Interrupt Controller List Register 3
6 c12 4 ICC_MCTLR 0x00000400 Interrupt Control Register for EL3
5 ICC_MSRE 0x00000000 System Register Enable Register for EL3
7 ICC_MGRPEN1 0x00000000 Interrupt Controller Monitor Interrupt Group 1 Enable register
Non-ConfidentialPDF file icon PDF versionARM 100241_0001_00_en
Copyright © 2016, 2017 ARM Limited or its affiliates. All rights reserved.