B1.48 Data Fault Address Register

The DFAR characteristics are:

Purpose
Holds the virtual address of the faulting address that caused a synchronous Data Abort exception.
Usage constraints

This register is accessible as follows:

 

EL0

(NS)

EL0

(S)

EL1

(NS)

EL1

(S)

EL2

EL3

(SCR.NS = 1)

EL3

(SCR.NS = 0)

DFAR(S) - - - RW - - RW
DFAR(NS) - - RW - RW RW -
Configurations

DFAR (S) is architecturally mapped to HDFAR. See B1.64 Hyp Data Fault Address Register.

Attributes
DFAR is a 32-bit register.
Figure B1-12 DFAR bit assignments
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VA, [31:0]

The Virtual Address of faulting address of synchronous Data Abort exception.

To access the DFAR:

MRC p15, 0, <Rt>, c6, c0, 0 ; Read DFAR into Rt
MCR p15, 0, <Rt>, c6, c0, 0 ; Write Rt to DFAR

Register access is encoded as follows:

Table B1-42 DFAR access encoding

coproc opc1 CRn CRm opc2
1111 000 0110 0000 000
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