B1.66 Hyp IPA Fault Address Register

The HPFAR characteristics are:

Purpose
Holds the faulting IPA for some aborts on a stage 2 translation taken to Hyp mode.
Usage constraints

This register is accessible as follows:

EL0

(NS)

EL0

(S)

EL1

(NS)

EL1

(S)

EL2

EL3

(SCR.NS = 1)

EL3

(SCR.NS = 0)

- - - - RW RW -

Execution in any Non-secure mode other than Hyp mode makes HPFAR unknown.

Configurations
There are no configuration notes.
Attributes
HPFAR is a 32-bit register.
Figure B1-22 HPFAR bit assignments
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FIPA[39:12], [31:4]

Bits [39:12] of the faulting intermediate physical address

[3:0]
Reserved, res0

To access the HPFAR:

MRC p15, 4, <Rt>, c6, c0, 4 ; Read HPFAR into Rt
MCR p15, 4, <Rt>, c6, c0, 4 ; Write Rt to HPFAR

Register access is encoded as follows:

Table B1-51 HPFAR access encoding

coproc opc1 CRn CRm opc2
1111 100 0110 0000 100
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