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The processor includes a ROM table that complies with the ARM CoreSight Architecture Specification.
This table contains a list of components such as processor debug units, processor Cross Trigger Interfaces (CTIs), processor Performance Monitoring Units (PMUs), and processor Embedded Trace Macrocell (ETM) trace units. Debuggers can use the ROM table to determine which components are implemented inside the Cortex®‑A32 processor.
If a component is not included in your configuration of the Cortex‑A32 processor, the corresponding debug APB ROM table entry is still present but the component is marked as not present.