B2.3 CPU Interface Identification Register

The GICC_IIDR characteristics are:

Purpose
Provides information about the implementer and revision of the CPU interface.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See the register summary in B2.1 CPU interface register summary.
Figure B2-1 GICC_IIDR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


ProductID, [31:20]

Identifies the product:

0x001Cortex®‑A32 processor.
Architecture version, [19:16]

Identifies the architecture version of the GIC CPU interface:

0x4GICv4.
Revision, [15:12]

Identifies the revision number for the CPU interface:

0x1r0p1.
Implementer, [11:0]

Contains the JEP106 code of the company that implements the CPU interface:

0x43BARM.
Non-ConfidentialPDF file icon PDF versionARM 100241_0001_00_en
Copyright © 2016, 2017 ARM Limited or its affiliates. All rights reserved.