C9.10 Performance Monitors Peripheral Identification Register 2

The PMPIDR2 characteristics are:

Purpose
Provides information to identify a Performance Monitor component.
Usage constraints

The accessibility to the PMPIDR2 by condition code is:

Off DLK OSLK EPMAD SLK Default
- - - - RO RO

C2.2 External register access permissions to the PMU registers describes the condition codes.

The PMPIDR2 can be accessed through the external debug interface.

Configurations
The PMPIDR2 is in the Debug power domain.
Attributes
See the register summary in C9.5 Memory-mapped PMU register summary.
Figure C9-7 PMPIDR2 bit assignments
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[31:8]

Reserved, res0.

Revision, [7:4]
0x1r0p1.
JEDEC, [3]
0b1RAO. Indicates a JEP106 identity code is used.
DES_1, [2:0]
0b011ARM Limited. This is the most significant nibble of JEP106 ID code.

The PMPIDR2 can be accessed through the external debug interface, offset 0xFE8.

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