C10.15 ViewInst Include-Exclude Control Register

The TRCVIIECTLR characteristics are:

Purpose
Defines the address range comparators that control the ViewInst Include/Exclude control.
Usage constraints
  • You must always program this register as part of trace unit initialization.
  • Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C10.1 ETM register summary.
Figure C10-14 TRCVIIECTLR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


[31:20]
Reserved, res0.
EXCLUDE, [19:16]
Defines the address range comparators for ViewInst exclude control. One bit is provided for each implemented Address Range Comparator.
[15:4]
Reserved, res0.
INCLUDE, [3:0]

Defines the address range comparators for ViewInst include control.

Selecting no include comparators indicates that all instructions must be included. The exclude control indicates which ranges must be excluded.

One bit is provided for each implemented Address Range Comparator.

The TRCVIIECTLR can be accessed through the external debug interface, offset 0x084.

Non-ConfidentialPDF file icon PDF versionARM 100241_0001_00_en
Copyright © 2016, 2017 ARM Limited or its affiliates. All rights reserved.