C10.38 Resource Selection Control Registers 2-16

The TRCRSCTLRn characteristics are:


Controls the trace resources.

There are eight resource pairs, the first pair is predefined as {0,1,pair=0} and having reserved select registers. This leaves seven pairs to be implemented as programmable selectors.

Usage constraints
Accepts writes only when the trace unit is disabled.
Available in all configurations.
See C10.1 ETM register summary.
Figure C10-37 TRCRSCTLRn bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Reserved, res0.


Inverts the result of a combined pair of resources.

This bit is implemented only on the lower register for a pair of resource selectors.

INV, [20]

Inverts the selected resources:

0Resource is not inverted.
1Resource is inverted.

Reserved, res0.

GROUP, [18:16]

Selects a group of resources. See the ARM ETM Architecture Specification, ETMv4 for more information.


Reserved, res0.

SELECT, [7:0]

Selects one or more resources from the required group. One bit is provided for each resource from the group.

The TRCRSCTLRn can be accessed through the external debug interface, offset 0x208-023C.

Non-ConfidentialPDF file icon PDF versionARM 100241_0001_00_en
Copyright © 2016, 2017 ARM Limited or its affiliates. All rights reserved.