C10.59 Software Lock Access Register

The TRCLAR characteristics are:

Purpose

Controls access to registers using the memory-mapped interface, when PADDRDBG31 is LOW.

When the software lock is set, write accesses using the memory-mapped interface to all ETM trace unit registers are ignored, except for write accesses to the TRCLAR.

When the software lock is set, read accesses of TRCPDSR do not change the TRCPDSR.STICKYPD bit. Read accesses of all other registers are not affected.

Usage constraints
Accessible only from the memory-mapped interface.
Configurations
Available in all configurations.
Attributes
See C10.1 ETM register summary.
Figure C10-57 TRCLAR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


KEY, [31:0]

Software lock key value:

0xC5ACCE55Clear the software lock.

All other write values set the software lock.

The TRCLAR can be accessed through the external debug interface, offset 0xFB0.

Non-ConfidentialPDF file icon PDF versionARM 100241_0001_00_en
Copyright © 2016, 2017 ARM Limited or its affiliates. All rights reserved.