3.3.12 Read Channel QoS Value Override Register

This register controls the override value for the ARQOS signal. The override value can be fixed or it can be programmed to change dynamically, depending on the requested bandwidth against an allocation.

Usage constraints
This register takes effect when the QOSOVERRIDE input for the corresponding slave interface is HIGH and the ARQOS value for the request is 0.
Accessible using only Secure accesses, unless you set the Secure Access Register to permit Non-secure accesses.
Configurations
Available in all CCI-550 configurations.
An instance of this register exists for each slave interface.
Attributes
See 3.2 Register summary for more information.
The following figure shows the bit assignments.
Figure 3-10 arqos_ovr register bit assignments
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The following table shows the bit assignments.

Table 3-13 arqos_ovr register bit assignments

Bits
Name
Function
[31]
reg_enable
Enable QoS value regulation.
This bit is WI if the implementation does not include QoS regulators on the corresponding interface.
If this bit is not set, qv_max is used as the override value.
[30:27]
-
Reserved.
[26:24]
excess_bytes_per_qv
Excess bytes permitted per QoS value.
These bits are WI if the implementation does not include QoS regulators on the corresponding interface
[23:20]
-
Reserved.
[19:16]
bandwidth_allocation
Bandwidth allocation in bytes per cycle.
These bits are WI if the implementation does not include QoS regulators on the corresponding interface
[15:8]
-
Reserved.
[7:4]
qv_min
Minimum value for ARQOS.
These bits are WI if the implementation does not include QoS regulators on the corresponding interface
[3:0]
qv_max
Maximum value for ARQOS.
This value is the override value if QoS regulation is not enabled.
Related reference
3.3.2 Secure Access Register
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