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Home > Programmers model > Register descriptions > Snoop Control Registers |
These registers control the issuing of snoop and DVM requests on slave interfaces.
Table 3-11 snoop_ctrl register bit assignments
Bits
|
Name |
Reset
|
Access
|
Function
|
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[31]
|
support_dvms |
ACCHANNELENSx[0] input
|
RO
|
Indicates whether the slave interface supports DVM messages.
This bit is overridden to 0 if you set the Control Override
Register bit[1].
|
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[30]
|
support_snoops |
ACCHANNELENSx[1] input for ACE interfaces.
This bit is set to 0 for ACE-Lite interfaces.
|
RO
|
Indicates whether the slave interface supports snoop
requests.
This bit is overridden to 0 if you set the Control Override
Register bit[0].
NoteThis bit only affects the operation of ACE interfaces. |
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[29]
|
hardware_snoop_enable_control |
IMPLEMENTATION DEFINED.
|
RO
|
Indicates whether the slave interface has a system coherency
interface to provide hardware snoop enable control.
|
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[28:2]
|
Reserved |
-
|
-
|
-
|
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[1]
|
enable_dvms |
0
|
RW
|
When the slave interface supports DVM messages, enables issuing
of DVM message requests from this slave interface:
This bit is RAZ/WI for interfaces that do not support DVM
messages.
If bit[29] is set to 1, indicating that hardware snoop control
is enabled, this bit indicates whether DVM message requests are enabled for this
interface:
NoteThis bit is writable only when bit[31] is set to 1 and bit[29] is set to 0. |
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[0]
|
enable_snoops |
0
|
RW
|
When the slave interface supports snoops, enables issuing of
snoop requests from this slave interface:
This bit is RAZ/WI for interfaces that do not support
snoops.
If bit[29] is set to 1, indicating that hardware snoop control
is enabled, this bit indicates whether snoop requests are enabled for this
interface:
Note
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