3.3.18 Overflow Flag Status Registers

These registers contain the state of the overflow flags for the event counters.

Usage constraints
There are no usage constraints.
Configurations
Available in all CCI-550 configurations.
One register exists for each event counter.
Attributes
See 3.2 Register summary for more information.
The following figure shows the bit assignments.
Figure 3-15 ecnt_clr_ovfl register bit assignments
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The following table shows the bit assignments.

Table 3-18 ecnt_clr_ovfl register bit assignments

Bits
Name
Function
[31:1]
Reserved
-
[0]
event_counter
Event counter overflow flag:
0The counter has not overflowed.
1The counter has overflowed.
When writing to this register, any overflow flag that is written with a value of 0 is ignored, that is, no change. An overflow flag that is written with a value of 1 clears the counter overflow flag. The negated counter overflow bits are exported from the CCI-550 on the nEVNTCNTOVERFLOW[7:0] signal. You can use this signal to trigger interrupts. The MSB corresponds to the cycle count overflow.
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