2.1 About the functions

The CCI-550 is a coherent interconnect that enables hardware coherency. In hardware coherent systems, an operating system can run over multiple processor clusters without complicated cache maintenance software. This is a fundamental requirement for advanced ARM® big.LITTLE™ processing models such as Global Task Scheduling (GTS).

In addition to the AXI and ACE interfaces, the CCI-550 provides interfaces that you can use for various system operations, such as:
The CCI-550 includes snoop functionality that permits snooping of the ACE interfaces. A snoop filter provides efficient snoop transaction management by keeping a record of the addresses stored in the caches of the attached ACE masters. This means that the snoop filter can often resolve coherency messaging instead of broadcasting to all ACE interfaces. This mechanism can offer system power savings and reduce the latency in the case where data is not held in any of the upstream caches.
A Performance Monitoring Unit (PMU) provides events and counters that indicate CCI-550 runtime performance. PMU registers provide information on the status of the interconnect and you can use these registers to help debug system deadlock. In addition, the CCI-550 provides a set of QoS regulation and control mechanisms.
The CCI-550 supports Secure and Non-secure operations that can be used within a system that uses ARM TrustZone® to provide Secure, Non-secure, and protected states.
The CCI-550 also supports cache maintenance operations and exclusive accesses.
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